FortifyIQ provides traditional and post-quantum certifiable cryptographic IP cores, cryptographic libraries, and roots of trust, all with high-assurance security - algorithmically hardened for inherent resistance to side-channel and fault injection attacks without compromising performance, area, or energy efficiency. Our soft-macro solutions are foundry- and platform-agnostic, integrating securely across a wide spectrum, from smart cards and IoT devices to AI accelerators and cloud systems. Backed by a strong portfolio of granted and pending patents, deep cryptographic research and formal and practical security proofs, FortifyIQ’s IP is developed and pre-validated using our own pre- and post-silicon EDA tools, enabling systematic evaluation of physical attack resilience. AES is Common Criteria certified to highest level security (AVA_VAN.5) by an SGS Brightsight Lab. All FortifyIQ products are certifiable at this level. FortifyIQ delivers advanced cryptography that is certifiable, reliable, and built to meet the challenges of high-assurance, real-world applications. For more information on FortifyIQ, please visit https://fortifyiq.com/
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Oct 28, 2025
www.design-reuse.com
FortifyIQ Secures the Quantum Era with Over-the-Air Updatable Cryptography
#Product Stage
Mar 17, 2025
fortifyiq.com
SEMISRAEL Tech Webinar - Semiconductor Security Simplified
Equipment attackers need has gotten cheaper, and it’s simple to do, so a hacker can easily attack your device, unless protection against these attacks is built in. If you need to comply with regulations, or pass a security certification, you’ll find that in order to secure your device you’ll need to give up the throughput, or area, or both. But we have news for you: You don't have to choose anymore!
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Jul 24, 2024
fortifyiq.com
REDUNDANCY AES MASKING BASIS FOR ATTACK MITIGATION (RAMBAM) - BREAKTHROUGH IN HARDWARE SECURITY
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Jul 18, 2024
fortifyiq.com
Carry-based Differential Power Analysis (CDPA) and its Application to Attacking HMAC-SHA-2 - BREAKTHROUGH IN HARDWARE SECURITY
In this paper, FortifyIQ introduces Carry-based Differential Power Analysis (CDPA), a novel methodology that allows for attacking schemes involving arithmetical addition. This methodology is applied to what is believed to be the first published full-fledged attack on HMAC-SHA-2 which does not require a profiling stage.
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Jan 18, 2022
semiengineering.com
FortifyIQ: Hardware Security Verification
FortifyIQ has developed a pre-silicon evaluation toolset that can be used to verify hardware designs, as well as IP cores. The technology produces physical attack simulation, where one can “mount a series of attacks and then uncover the values of secret keys as proof that the design is vulnerable.
FortifyIQ Secures the Quantum Era with Over-the-Air Updatable Cryptography
#Product Stage
Mar 17, 2025
fortifyiq.com
SEMISRAEL Tech Webinar - Semiconductor Security Simplified
Equipment attackers need has gotten cheaper, and it’s simple to do, so a hacker can easily attack your device, unless protection against these attacks is built in. If you need to comply with regulations, or pass a security certification, you’ll find that in order to secure your device you’ll need to give up the throughput, or area, or both. But we have news for you: You don't have to choose anymore!
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Jul 24, 2024
fortifyiq.com
REDUNDANCY AES MASKING BASIS FOR ATTACK MITIGATION (RAMBAM) - BREAKTHROUGH IN HARDWARE SECURITY
undefined
Jul 18, 2024
fortifyiq.com
Carry-based Differential Power Analysis (CDPA) and its Application to Attacking HMAC-SHA-2 - BREAKTHROUGH IN HARDWARE SECURITY
In this paper, FortifyIQ introduces Carry-based Differential Power Analysis (CDPA), a novel methodology that allows for attacking schemes involving arithmetical addition. This methodology is applied to what is believed to be the first published full-fledged attack on HMAC-SHA-2 which does not require a profiling stage.
undefined
Jan 18, 2022
semiengineering.com
FortifyIQ: Hardware Security Verification
FortifyIQ has developed a pre-silicon evaluation toolset that can be used to verify hardware designs, as well as IP cores. The technology produces physical attack simulation, where one can “mount a series of attacks and then uncover the values of secret keys as proof that the design is vulnerable.