Jamil R. Mazzawi

Optima is hiring: 4 open positions: http://optima-da.com/careers/ If you care about these topics, continue reading: * soft-errors * hard-errors * ISO-26262, Automotive chips * chip reliability * space chips * Rad-Hard-chips Optima allows chip designers to finish the fault-injection "campaign" for soft-error mitigation or ISO-26262 certification in days instead of months. Jamil is the founder and CEO of Optima Design Automation, a leading EDA solutions company in the area of soft-error mitigation, ISO-26262 certification and electronic-chips reliability. (see details about Optima below). At Optima, Jamil is focuses on product definition and product development, finding new partners and customers to work with, with special interest in high-reliability electronic chips, like high-end networks, automotive and aerospace industries in Europe. Jamil has over 22 years of experience in the industries of EDA (Verisity, Jasper) and semiconductors (Ornet Data Comm., Rambus, Sun microsystems). Jamil has unique capability to understand the needs of the EDA tools users then translating these needs into specs and features of the EDA tool while keeping the feasibility of the implementation in mind. At Verisity, he designed and speced the first version of the "Verification Manager", now known as Incisive vManager, Cadences regression management platform. At Jasper he worked on defining and specing number of tools and flows: Complexity Manager, SST convergence flow, LPV-App (Low Power Verification). Jamil has extensive EDA sales experience from working at Jasper and Verisity, with huge network of industry experts and decision makers. Jamil's specialties: Soft-Errors, SEU - Single Even upset, hardening, flip-flop selection, Chip verification, RTL verification, Verilog, VHDL, custom EDA solutions, Post Silicon Debug, Low Power Verification LPV, Formal Verification, Verification team, Processors, hardened processors, SoC, ASIC, FPGA.